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iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 high speed quad digital isolators check for samples: iso7240cf , iso7240c , iso7240m , iso7241c , iso7241m , iso7242c , iso7242m 1 features ? selectable failsafe output (iso7240cf) ? 4 kv esd protection ? 25 and 150-mbps signaling rate options ? operate with 3.3-v or 5-v supplies ? low channel-to-channel output skew; ? high electromagnetic immunity (see application report slla181 ) 1 ns max ? ? 40 c to 125 c operating range ? low pulse-width distortion (pwd); 2 ns max applications ? low jitter content; 1 ns typ at 150 mbps ? industrial fieldbus ? typical 25-year life at rated working voltage ? computer peripheral interface (see application note slla197 and figure 17 ) ? servo control interface ? 4000-v peak isolation, 560-v peak v iorm ? data acquisition ? ul 1577 , iec 60747-5-2 (vde 0884, rev 2), iec 61010-1, iec 60950-1 and csa approved description the iso7240, iso7241 and iso7242 are quad-channel digital isolators with multiple channel configurations and output enable functions. these devices have logic input and output buffers separated by ti ? s silicon dioxide (sio 2 ) isolation barrier. used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and prevent noise currents from entering the local ground and interfering with or damaging sensitive circuitry. the iso7240 has all four channels in the same direction while the iso7241 has three channels the same direction and one channel in opposition. the iso7242 has two channels in each direction. the c option devices have ttl input thresholds and a noise-filter at the input that prevents transient pulses from being passed to the output of the device. the m option devices have cmos vcc/2 input thresholds and do not have the input noise-filter or the additional propagation delay. the iso7240cf has an input disable function on pin 7, and a selectable high or low failsafe-output function with the ctrl pin (pin 10). the failsafe-output is a logic high when a logic-high is placed on the ctrl pin or it is left unconnected. if a logic-low signal is applied to the ctrl pin, the failsafe-output becomes a logic-low output state. the iso7240cf input disable function prevents data from being passed across the isolation barrier to the output. when the inputs are disabled, the outputs are set by the ctrl pin. these devices may be powered from either 3.3-v or 5-v supplies on either side in any 3.3-v / 3.3-v, 5-v / 5-v, 5-v / 3.3-v, or 3.3-v / 5-v combination. note that the signal input pins are 5-v tolerant regardless of the voltage supply level being used. these devices are characterized for operation over the ambient temperature range of ? 40 c to 125 c. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. copyright ? 2007 ? 2010, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. 1 23 4 5 6 7 8 iso7240 9 10 11 12 13 14 15 16 nc in a gnd1 v cc1 gnd1 gnd2 gnd2 in b in c out a out c out b en v cc2 in d out d 12 3 4 56 7 8 iso7241 9 10 11 12 13 14 15 16 in a gnd1 v cc1 gnd1 gnd2 gnd2 in b in c out a out c out b v cc2 in d out d en 2 en 1 12 3 4 56 7 8 iso7242 9 10 11 12 13 14 15 16 in a gnd1 v cc1 gnd1 gnd2 gnd2 in b out a out b v cc2 in d out d en 2 en 1 out c in c disable in a gnd1 v cc1 gnd1 in b in c in d gnd2 gnd2 out a out c out b ctrl v cc2 out d iso7240cf 1 23 4 5 6 7 8 9 10 11 12 13 14 15 16
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. table 1. device function table iso724x (1) input output enable output input v cc output v cc (in) (en) (out) h h or open h l h or open l pu pu x l z open h or open h pd pu x h or open h pd pu x l z (1) pu = powered up; pd = powered down ; x = irrelevant; h = high level; l = low level table 2. iso7240cf function table v cc1 v cc2 data input disable input failsafe control input data output (in) (disable) (ctrl) (out) pu pu h l or open x h pu pu l l or open x l x pu x h h or open h x pu x h l l pd pu x x h or open h pd pu x x l l available options signaling input channel marked ordering product rate threshold configuration as number (1) iso7240cdw (rail) ~1.5 v (ttl) iso7240cdw 25 mbps iso7240c (cmos compatible) iso7240cdwr (reel) iso7240cfdw (rail) ~1.5 v (ttl) iso7240cf 25 mbps 4/0 iso7240cf (cmos compatible) iso7240cfdwr (reel) iso7240mdw (rail) iso7240mdw 150 mbps vcc/2 (cmos) iso7240m iso7240mdwr (reel) iso7241cdw (rail) ~1.5 v (ttl) iso7241cdw 25 mbps iso7241c (cmos compatible) iso7241cdwr (reel) 3/1 iso7241mdw (rail) iso7241mdw 150 mbps vcc/2 (cmos) iso7241m iso7241mdwr (reel) iso7242cdw (rail) ~1.5 v (ttl) iso7242cdw 25 mbps iso7242c (cmos compatible) iso7242cdwr (reel) 2/2 iso7242mdw (rail) iso7242mdw 150 mbps vcc/2 (cmos) iso7242m iso7242mdwr (reel) (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti website at www.ti.com . 2 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 absolute maximum ratings (1) value unit v cc supply voltage (2) , v cc1 , v cc2 ? 0.5 to 6 v v i voltage at in, out, en, disable, ctrl ? 0.5 to 6 v i o output current 15 ma human body model jedec standard 22, test method a114-c.01 4 kv electrostatic field-induced-charged device esd jedec standard 22, test method c101 all pins 1 discharge model machine model ansi/esds5.2-1996 200 v t j maximum junction temperature 170 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltage values are with respect to network ground terminal and are peak voltage values. recommended operating conditions min typ max unit v cc supply voltage (1) , v cc1 , v cc2 3.15 5.5 v i oh high-level output current 4 ma i ol low-level output current ? 4 ma iso724xc 40 t ui input pulse width ns iso724xm 6.67 5 iso724xc 0 30 (2) 25 1/t ui signaling rate mbps iso724xm 0 200 (2) 150 v ih high-level input voltage (in) 0.7 v cc v cc v iso724xm v il low-level input voltage (in) 0 0.3 v cc v v ih high-level input voltage (in, disable, ctrl, en) 2 v cc v iso724xc v il low-level input voltage (in, disable, ctrl, en) 0 0.8 v t j junction temperature 150 c external magnetic field-strength immunity per iec 61000-4-8 and iec 61000-4-9 h 1000 a/m certification (1) for the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v. for the 3-v operation, v cc1 or v cc2 is specified from 3.15 v to 3.6 v. (2) typical value at room temperature and well-regulated power supply. iec 60747-5-2 insulation characteristics (1) over recommended operating conditions (unless otherwise noted) parameter test conditions specifications unit v iorm maximum working insulation voltage 560 v after input/output safety test subgroup 2/3 v pr = v iorm 1.2, t = 10 s, 672 v partial discharge < 5 pc method a, v pr = v iorm 1.6, v pr input to output test voltage type and sample test with t = 10 s, 896 v partial discharge < 5 pc method b1, v pr = v iorm 1.875, 100 % production test with t = 1 s, 1050 v partial discharge < 5 pc v iotm transient overvoltage t = 60 s 4000 v r s insulation resistance v io = 500 v at t s > 10 9 ? pollution degree 2 (1) climatic classification 40/125/21 copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 3 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com electrical characteristics: v cc1 and v cc2 at 5-v (1) operation , over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit supply current quiescent 1 3 v i = v cc or 0 v, all channels, no load, iso7240c/m ma en 2 at 3 v 25 mbps 7 10.5 quiescent 6.5 11 v i = v cc or 0 v, all channels, no load, i cc1 iso7241c/m ma en 1 at 3 v, en 2 at 3 v 25 mbps 12 18 quiescent 10 16 v i = v cc or 0 v, all channels, no load, iso7242c/m ma en 1 at 3 v, en 2 at 3 v 25 mbps 15 24 quiescent 15 22 v i = v cc or 0 v, all channels, no load, iso7240c/m ma en 2 at 3 v 25 mbps 17 25 quiescent 13 20 v i = v cc or 0 v, all channels, no load, i cc2 iso7241c/m ma en 1 at 3 v, en 2 at 3 v 25 mbps 18 28 quiescent 10 16 v i = v cc or 0 v, all channels, no load, iso7242c/m ma en 1 at 3 v, en 2 at 3 v 25 mbps 15 24 electrical characteristics i off sleep mode output current en at 0 v, single channel 0 m a i oh = ? 4 ma, see figure 1 v cc ? 0.8 v oh high-level output voltage v i oh = ? 20 m a, see figure 1 v cc ? 0.1 i ol = 4 ma, see figure 1 0.4 v ol low-level output voltage v i ol = 20 m a, see figure 1 0.1 v i(hys) input voltage hysteresis 150 mv i ih high-level input current 10 in from 0 v to v cc m a i il low-level input current ? 10 c i input capacitance to ground in at v cc , v i = 0.4 sin (4e6 p t) 2 pf cmti common-mode transient immunity v i = v cc or 0 v, see figure 5 25 50 kv/ m s (1) for the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v. for the 3-v operation, v cc1 or v cc2 is specified from 3.15 v to 3.6 v. 4 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 switching characteristics: v cc1 and v cc2 at 5-v operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay 18 42 iso724xc ns pwd pulse-width distortion (1) |t phl ? t plh | 2.5 see figure 1 t plh , t phl propagation delay 10 23 iso724xm ns pwd pulse-width distortion (1) |t phl ? t plh | 1 2 iso724xc 8 t sk(pp) part-to-part skew (2) ns iso724xm 0 3 iso724xc 2 t sk(o) channel-to-channel output skew (3) ns iso724xm 0 1 t r output signal rise time 2 see figure 1 ns t f output signal fall time 2 t phz propagation delay, high-level-to-high-impedance output 15 20 t pzh propagation delay, high-impedance-to-high-level output 15 20 see figure 2 ns t plz propagation delay, low-level-to-high-impedance output 15 20 t pzl propagation delay, high-impedance-to-low-level output 15 20 t fs failsafe output delay time from input power loss see figure 3 12 m s t wake wake time from input disable see figure 4 15 m s 150 mbps nrz data input, same t jit(pp) peak-to-peak eye-pattern jitter iso724xm polarity input on all channels, see 1 ns figure 6 (1) also referred to as pulse skew. (2) t sk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) t sk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads. copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 5 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com electrical characteristics: v cc1 at 5-v, v cc2 at 3.3-v (1) operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit supply current quiescent 1 3 iso7240c/m v i = v cc or 0 v, all channels, no load, en 2 at 3 v ma 25 mbps 7 10.5 quiescent 6.5 11 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, i cc1 iso7241c/m ma en 2 at 3 v 25 mbps 12 18 quiescent 10 16 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, iso7242c/m ma en 2 at 3 v 25 mbps 15 24 quiescent 9.5 15 iso7240c/m v i = v cc or 0 v, all channels, no load, en 2 at 3 v ma 25 mbps 10.5 17 quiescent 8 13 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, i cc2 iso7241c/m ma en 2 at 3 v 25 mbps 11.5 18 quiescent 6 10 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, iso7242c/m ma en 2 at 3 v 25 mbps 9 14 electrical characteristics i off sleep mode output current en at 0 v, single channel 0 m a iso7240 v cc ? 0.4 i oh = ? 4 ma, see figure 1 iso724x (5-v v oh high-level output voltage v cc ? 0.8 v side) i oh = ? 20 m a, see figure 1 v cc ? 0.1 i ol = 4 ma, see figure 1 0.4 v ol low-level output voltage v i ol = 20 m a, see figure 1 0.1 v i(hys) input voltage hysteresis 150 mv i ih high-level input current 10 in from 0 v to v cc m a i il low-level input current ? 10 c i input capacitance to ground in at v cc , v i = 0.4 sin (4e6 p t) 2 pf common-mode transient v i = v cc or 0 v, see figure 5 cmti 25 50 kv/ m s immunity (1) for the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v. for the 3-v operation, v cc1 or v cc2 is specified from 3.15 v to 3.6 v. 6 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 switching characteristics: v cc1 at 5-v, v cc2 at 3.3-v operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay see figure 1 20 50 iso724xc ns pwd pulse-width distortion (1) |t phl ? t plh | 3 t plh , t phl propagation delay iso724xm 12 29 ns pwd pulse-width distortion (1) |t phl ? t plh | 1 2 iso724xc 10 t sk(pp) part-to-part skew (2) ns iso724xm 0 5 iso724xc 3 t sk(o) channel-to-channel output skew (3) ns iso724xm 0 1 t r output signal rise time 2 see figure 1 ns t f output signal fall time 2 t phz propagation delay, high-level-to-high-impedance output 15 20 t pzh propagation delay, high-impedance-to-high-level output 15 20 see figure 2 ns t plz propagation delay, low-level-to-high-impedance output 15 20 t pzl propagation delay, high-impedance-to-low-level output 15 20 t fs failsafe output delay time from input power loss see figure 3 18 m s t wake wake time from input disable see figure 4 15 m s 150 mbps prbs nrz data t jit(pp) peak-to-peak eye-pattern jitter iso724xm input, same polarity input on 1 ns all channels, see figure 6 (1) also known as pulse skew (2) t sk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) t sk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads. copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 7 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com electrical characteristics: v cc1 at 3.3-v, v cc2 at 5-v (1) operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit supply current quiescent v i = v cc or 0 v, all channels, no load, en 2 at 3 v 0.5 1 iso7240c/m ma 25 mbps 3 5 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, quiescent 4 7 en 2 at 3 v iso7241c/m ma i cc1 25 mbps 6.5 11 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, quiescent 6 10 en 2 at 3 v iso724c/m ma 25 mbps 9 14 quiescent v i = v cc or 0 v, all channels, no load, en 2 at 3 v 15 22 iso7240c/m ma 25 mbps 17 25 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, quiescent 13 20 en 2 at 3 v iso7241c/m ma i cc2 25 mbps 18 28 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, quiescent 10 16 en 2 at 3 v iso7242c/m ma 25 mbps 15 24 electrical characteristics i off sleep mode output current en at 0 v, single channel 0 m a iso7240 v cc ? 0.4 i oh = ? 4 ma, see figure 1 v oh high-level output voltage iso724x (5-v side) v cc ? 0.8 v i oh = ? 20 m a, see figure 1 v cc ? 0.1 i ol = 4 ma, see figure 1 0.4 v ol low-level output voltage v i ol = 20 m a, see figure 1 0.1 v i(hys) input voltage hysteresis 150 mv i ih high-level input current 10 in from 0 v to v cc m a i il low-level input current ? 10 c i input capacitance to ground in at v cc , v i = 0.4 sin (4e6 p t) 2 pf common-mode transient v i = v cc or 0 v, see figure 5 cmti 25 50 kv/ m s immunity (1) for the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v. for the 3-v operation, v cc1 or v cc2 is specified from 3.15 v to 3.6 v. 8 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 switching characteristics: v cc1 at 3.3-v and v cc2 at 5-v operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay 22 51 iso724xc ns pwd pulse-width distortion (1) |t phl ? t plh | 3 see figure 1 t plh , t phl propagation delay 12 30 iso724xm ns pwd pulse-width distortion (1) |t phl ? t plh | 1 2 iso724xc 10 t sk(pp) part-to-part skew (2) ns iso724xm 0 5 iso724xc 2.5 t sk(o) channel-to-channel output skew (3) ns iso724xm 0 1 t r output signal rise time 2 see figure 1 ns t f output signal fall time 2 t phz propagation delay, high-level-to-high-impedance output 15 20 t pzh propagation delay, high-impedance-to-high-level output 15 20 see figure 2 ns t plz propagation delay, low-level-to-high-impedance output 15 20 t pzl propagation delay, high-impedance-to-low-level output 15 20 t fs failsafe output delay time from input power loss see figure 3 12 m s t wake wake time from input disable see figure 4 15 m s 150 mbps nrz data input, same t jit(pp) peak-to-peak eye-pattern jitter iso724xm polarity input on all channels, see 1 ns figure 6 (1) also known as pulse skew (2) t sk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) t sk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads. copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 9 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com electrical characteristics: v cc1 and v cc2 at 3.3 v (1) operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit supply current quiescent 0.5 1 v i = v cc or 0 v, all channels, no load, iso7240c/m ma en 2 at 3 v 25 mbps 3 5 iso7241c/m quiescent 4 7 v i = v cc or 0 v, all channels, no load, i cc1 en 1 at 3 v, en 2 at 3 v 25 mbps 6.5 11 ma iso7242c/m quiescent 6 10 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, en 2 at 3 v 25 mbps 9 14 quiescent 9.5 15 v i = v cc or 0 v, all channels, no load, iso7240c/m ma en 2 at 3 v 25 mbps 10.5 17 iso7241c/m quiescent 8 13 v i = v cc or 0 v, all channels, no load, i cc2 en 1 at 3 v, en 2 at 3 v 25 mbps 11.5 18 ma iso7242c/m quiescent 6 10 v i = v cc or 0 v, all channels, no load, en 1 at 3 v, en 2 at 3 v 25 mbps 9 14 electrical characteristics i off sleep mode output current en at 0 v, single channel 0 m a i oh = ? 4 ma, see figure 1 v cc ? 0.4 v oh high-level output voltage v i oh = ? 20 m a, see figure 1 v cc ? 0.1 i ol = 4 ma, see figure 1 0.4 v ol low-level output voltage v i ol = 20 m a, see figure 1 0.1 v i(hys) input voltage hysteresis 150 mv i ih high-level input current 10 in from 0 v or v cc m a i il low-level input current ? 10 c i input capacitance to ground in at v cc , v i = 0.4 sin (4e6 p t) 2 pf cmti common-mode transient immunity v i = v cc or 0 v, see figure 5 25 50 kv/ m s (1) for the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v. for the 3-v operation, v cc1 or v cc2 is specified from 3.15 v to 3.6 v. 10 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 switching characteristics: v cc1 and v cc2 at 3.3-v operation over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit t plh , t phl propagation delay 25 56 iso724xc ns pwd pulse-width distortion |t phl ? t plh | (1) 4 see figure 1 t plh , t phl propagation delay 12 34 iso724xm ns pwd pulse-width distortion |t phl ? t plh | (1) 1 2 iso724xc 10 t sk(pp) part-to-part skew (2) ns iso724xm 0 5 iso724xc 3.5 t sk(o) channel-to-channel output skew (3) ns iso724xm 0 1 t r output signal rise time 2 ns see figure 1 t f output signal fall time 2 ns t phz propagation delay, high-level-to-high-impedance output 15 20 t pzh propagation delay, high-impedance-to-high-level output 15 20 see figure 2 ns t plz propagation delay, low-level-to-high-impedance output 15 20 t pzl propagation delay, high-impedance-to-low-level output 15 20 t fs failsafe output delay time from input power loss see figure 3 18 m s t wake wake time from input disable see figure 4 15 m s 150 mbps prbs nrz data input, t jit(pp) peak-to-peak eye-pattern jitter iso724xm same polarity input on all channels, 1 ns see figure 6 (1) also referred to as pulse skew. (2) t sk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) t sk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads. copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 11 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com parameter measurement information a. the input pulse is supplied by a generator having the following characteristics: prr 50 khz, 50% duty cycle, t r 3 ns, t f 3 ns, z o = 50 ? . b. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. figure 1. switching characteristic test circuit and voltage waveforms a. the input pulse is supplied by a generator having the following characteristics: prr 50 khz, 50% duty cycle, t r 3 ns, t f 3 ns, z o = 50 ? . b. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. figure 2. enable/disable propagation delay time test circuit and waveform 12 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m in out v o c l input generator 50 w v i note a note b v 1/2 cc t f t r 10% 90% 50% 0 v 50% v i t plh t phl v oh v ol isolation barrier v o v 1/2 cc v 1 cc input generator 50 w out en v o v i in 0v isolation barrier c l note a note b v cc input generator out r = 1 k 1% l w en v o v i in 3v isolation barrier c l note a note b vcc/2 vcc 0 v 0 v v i vcc/2 50% 0.5 v t phz t pzh v o v oh vcc vcc 0 v t plz t v o v i vcc /2 vcc /2 0.5 v v ol 50% pzl r = 1 k 1% l w 50 w
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 parameter measurement information (continued) a. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. b. the input pulse is supplied by a generator having the following characteristics: prr 50 khz, 50% duty cycle, t r 3 ns, t f 3 ns, z o = 50 ? . figure 3. failsafe delay time test circuit and voltage waveforms a. whichever test yields the longest time is used in this data sheet. figure 4. wake time from input disable test circuit and voltage waveforms copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 13 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m v o input generator 50 w out disable v i in 0v v o v i v cc2 /2 50 % 50 % t wake v o input generator 50 w out disable v o v i in 0 v c l wake t v cc2 /2 ( note a) ( note a ) c l ( note b) (note b ) v cc2 v cc2 v cc 2 v cc2 0 v 0 v 0 v 0 v note: which ever test yields the longest time is used in this datasheet v i ctrl 3 v ctrl 3 v isolation barrier isolation barrier t fs in out isolation barrier 0 v or v 1 cc v 1 cc v i c l note b v o v i v o 50% v 1 cc 0 v v oh v ol 2.7 v fs low
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com parameter measurement information (continued) a. c l = 15 pf and includes instrumentation and fixture capacitance within 20%. b. the input pulse is supplied by a generator having the following characteristics: prr 50 khz, 50% duty cycle, t r 3 ns, t f 3 ns, z o = 50 ? . figure 5. common-mode transient immunity test circuit and voltage waveform note: prbs bit pattern run length is 2 16 ? 1. transition time is 800 ps. nrz data input has no more than five consecutive 1s or 0s. figure 6. peak-to-peak eye-pattern jitter test circuit and voltage waveform device information package characteristics parameter test conditions min typ max unit l(i01) minimum air gap (clearance) shortest terminal-to-terminal distance through air 8.34 mm shortest terminal-to-terminal distance across the l(i02) minimum external tracking (creepage) 8.1 mm package surface tracking resistance (comparative c ti din iec 60112/vde 0303 part 1 175 v tracking index) minimum internal gap (internal distance through the insulation 0.008 mm clearance) input to output, v io = 500 v, all pins on each side of the r io isolation resistance > 10 12 ? barrier tied together creating a two-terminal device c io barrier capacitance input to output v i = 0.4 sin (4e6 p t) 2 pf c i input capacitance to ground v i = 0.4 sin (4e6 p t) 2 pf 14 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m out tektronix hfs9009 pattern generator in dut tektronix 784d v 1 cc 0 v v / 2 c c jitter v cm in out gnd1 note b s1 v or v oh ol isolation barrier v 1 cc v 2 cc c = 0.1 f 1% m c = 0.1 f 1% m gnd2 pass-fail criteria:output must remain stable
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 iec 60664-1 ratings table parameter test conditions specification basic isolation group material group iiia rated mains voltage 150 vrms i-iv installation classification rated mains voltage 300 vrms i-iii spacer regulatory information vde csa ul recognized under 1577 certified according to iec approved under csa component component recognition 60747-5-2 acceptance notice program (1) file number: 40016131 file number: 1698195 file number: e181974 (1) production tested 3000 vrms for 1 second in accordance with ul 1577. spacer device i/o schematics copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 15 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m out 8 w 13 w v cc output in v cc v cc iso7240cf input 1 m w v cc 500 w v cc en enable 500 w v cc 1 m w in v cc v cc v cc input 1 m w 500 w
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com thermal characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions min typ max unit low-k thermal resistance (1) 168 q ja junction-to-air c/w high-k thermal resistance 96.1 q jb junction-to-board thermal resistance 61 c/w q jc junction-to-case thermal resistance 48 c/w v cc1 = v cc2 = 5.5 v, t j = 150 c, c l = 15 pf, p d device power dissipation 220 mw input a 50% duty cycle square wave (1) tested in accordance with the low-k or high-k thermal metric definitions of eia/jesd51-3 for leaded surface mount packages. spacer typical characteristic curves iso7240c/m rms supply current iso7241c/m rms supply current vs vs signaling rate signaling rate figure 7. figure 8. iso7242c/m rms supply current propagation delay vs vs signaling rate free-air temperature figure 9. figure 10. 16 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m 0 5 10 15 20 25 30 35 40 45 0 25 50 75 100 125 150 signaling rate - mbps i - supply current - ma/rms cc t = 25c, load = 15 pf, all channels a 5-v i cc1 ,i cc2 3.3-v i cc1 ,i cc2 0 5 10 15 20 25 30 35 0 25 50 75 100 125 150 signaling rate - mbps i - supply current - ma/rms cc 40 45 t = 25c, load = 15 pf, all channels a 5-v i cc2 3.3-v i cc2 3.3-v i cc1 5-v i cc1 0 5 10 15 20 25 30 35 40 45 0 25 50 75 100 125 150 signaling rate - mbps i - supply current - ma/rms cc t = 25c, load = 15 pf, all channels a 5-v i cc2 3.3-v i cc2 3.3-v i cc1 5-v i cc1 0 5 10 15 20 25 30 35 40 45 -40 -25 -10 5 20 35 50 65 80 95 110 125 t - free-air temperature - c a propagation delay - ns t = 25c, load = 15 pf, all channels a c 3.3-v , t phl t plh m 3.3-v , t phl t plh c 5-v , t phl t plh m 5-v , t phl t plh
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 typical characteristic curves (continued) input voltage threshold v cc1 failsafe threshold vs vs free-air temperature free-air temperature figure 11. figure 12. high-level output current low-level output current vs vs high-level output voltage low-level output voltage figure 13. figure 14. copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 17 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m 0 10 20 30 40 50 0 2 4 6 i - output current - ma o v - output voltage - v o v = 5 v cc v = 3.3 v cc load = 15 pf, t = 25 c a 0 5 10 15 20 25 30 35 40 45 50 0 1 2 3 4 5 i - output current - ma o v - output voltage - v o v = 5 v cc v = 3.3 v cc load = 15 pf, t = 25 c a 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 -40 -25 -10 5 20 35 50 65 80 95 110 125 t - free-air temperature - c a v failsafe threshold - v cc1 - v fs+ v fs- v at 5 v or 3.3 v, load = 15 pf, air flow at 7/cf/m, low-k board cc 1 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 -40 -25 -10 5 20 35 50 65 80 95 110 125 input voltage threshold - v t - free-air temperature - c a 5 v v th+ 3.3 v v th+ 5 v v th- 3.3 v v th- air flow at 7 cf/m,low_k board
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com application information figure 15. typical iso7240x application circuit figure 16. typical iso7240cf failsafe-low application circuit 18 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m 1 23 4 56 7 8 iso7240cf 9 10 11 12 13 14 15 16 disable in a gnd1 gnd1 gnd2 gnd2 in b in c out a out c out b in d out d ctrl 0.1 f m v cc1 2 mm max. from v cc1 2 mm max. from v cc2 v cc2 0.1 f m 1 23 4 56 7 8 iso7240x 9 10 11 12 13 14 15 16 nc in a gnd1 gnd1 gnd2 gnd2 in b in c out a out c out b in d out d en 0.1 f m v cc1 2 mm max. from v cc1 2 mm max. from v cc2 v cc2 0.1 f m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 life expectancy vs. working voltage figure 17. time-dependant dielectric breakdown testing results revision history changes from original (september 2007) to revision a page ? deleted product preview note .............................................................................................................................................. 2 ? changed v cc supply voltage in the roc table from: 3.6 to: 3.45 ................................................................................... 3 ? changed v cc supply voltage in the roc table from: 3 to: 3.15 ...................................................................................... 3 ? changed tbds to actual values. .......................................................................................................................................... 4 ? changed c i - typ value from: 1 to: 2 .................................................................................................................................. 4 ? changed propagation delay max from: 22 to: 23 .............................................................................................................. 5 ? changed c i - typ value from: 1 to: 2 .................................................................................................................................. 6 ? changed propagation delay max from: 46 to: 50 .............................................................................................................. 7 ? changed propagation delay max from: 28 to: 29 .............................................................................................................. 7 ? changed iso724xa/c max value from: 2.5 to: 3 ............................................................................................................... 7 ? changed c i - typ value from: 1 to: 2 .................................................................................................................................. 8 ? changed propagation delay max from: 26 to: 30 .............................................................................................................. 9 ? changed typ value from: 1 to: 2 ....................................................................................................................................... 10 ? changed propagation delay max from: 32 to: 34 ............................................................................................................ 11 ? changed iso724xa/c max value from: 3 to: 3.5 ............................................................................................................. 11 ? changed c io - typ value from: 1 to: 2 .............................................................................................................................. 14 ? changed c i - typ value from: 1 to: 2 ................................................................................................................................ 14 ? changed the regulatory information table ......................................................................................................... 15 ? changed figure 7 , figure 8 , and figure 10 . added figure 9 . ........................................................................................... 16 changes from revision a (december 2007) to revision b page ? changed v cc supply voltage in the roc table from: 3.45 to: 3.6 ................................................................................... 3 changes from revision b (august 2008) to revision c page ? deleted min = 4.5 v and max = 5.5 v for supply voltage of the roc table. ..................................................................... 3 ? changed v cc supply voltage in the roc table from: 3.6 to: 5.5 ..................................................................................... 3 copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 19 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m 10 100 0 250 500 750 1000 working voltage (v iorm ) -- v working life -- years v iorm at 560-v 28 years 880 120
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m slls868l ? september 2007 ? revised january 2010 www.ti.com changes from revision c (april 2008) to revision d page ? changed feature bullet 4000-v peak isolation ........................................................................................................................ 1 ? added t sk(pp) part-to-part skew .............................................................................................................................................. 5 ? added t sk(pp) part-to-part skew .............................................................................................................................................. 7 ? added t sk(pp) part-to-part skew .............................................................................................................................................. 9 ? added t sk(pp) part-to-part skew ............................................................................................................................................ 11 ? changed typical iso724x application circuit figure 15 .................................................................................................... 18 changes from revision d (april 2008) to revision e page ? added table note: or the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v. ....................................................... 3 ? added table note: or the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v ........................................................ 4 ? added table note: or the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v ........................................................ 6 ? added table note: or the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v ........................................................ 8 ? added table note: or the 5-v operation, v cc1 or v cc2 is specified from 4.5 v to 5.5 v ...................................................... 10 changes from revision e (may 2008) to revision f page ? changed title from: quad digital isolators to: high speed quad digital isolators ............................... 1 ? deleted iso724xa devices. see slls905 for the iso7240a, iso7241a, and iso7242a. ................................................ 1 ? changed feature low jitter content - from: 1, 25, and 150-mbps signaling rate options to: 25, and 150-mbps signaling rate options ......................................................................................................................................................... 1 ? added t sk(pp) footnote. ............................................................................................................................................................ 5 ? added t sk(o) footnote. ............................................................................................................................................................. 5 ? added t sk(pp) footnote. .......................................................................................................................................................... 11 ? added t sk(o) footnote. ........................................................................................................................................................... 11 changes from revision f (may 2008) to revision g page ? changed the package characteristics table, line , l (io1) min value from7.7mm to 8.34mm ................................ 14 changes from revision g (july 2008) to revision h page ? added device number iso7240cf. ..................................................................................................................................... 1 ? added features bullet: selectable failsafe output (iso7240cf) ....................................................................................... 1 ? changed description paragraph 4 text. ................................................................................................................................. 1 ? added for device number iso7240cf. ................................................................................................................................. 2 ? changed v i in the abs max table from: voltage at in, out, en to: voltage at in, out, en, disable, ctrl ............. 3 ? added t wake , wake time from input disable ........................................................................................................................... 5 ? added t wake , wake time from input disable ........................................................................................................................... 7 ? added t wake , wake time from input disable ........................................................................................................................... 9 ? added t wake , wake time from input disable ......................................................................................................................... 11 changes from revision h (october 2008) to revision i page ? added information to the features bullet to include csa and iec 60950-1 certification ..................................................... 1 20 submit documentation feedback copyright ? 2007 ? 2010, texas instruments incorporated product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
iso7240cf , iso7240c , iso7240m iso7241c , iso7241m iso7242c , iso7242m www.ti.com slls868l ? september 2007 ? revised january 2010 changes from revision i (december 2008) to revision j page ? changed i cc1 for quiescent and 1mbps from: 10ma to: 11ma ......................................................................................... 4 ? changed i cc1 for quiescent and 1mbps from: 10ma to: 11ma ......................................................................................... 6 changes from revision j (april 2009) to revision k page ? changed the input circuit in the device i/o schematics illustration ............................................................................ 15 changes from revision k (decemberl 2009) to revision l page ? added the iec 60747-5-2 insulation characteristic table ..................................................................................... 3 ? added c ti - tracking resistance (comparative tracking index to the package characteristics table ................... 14 ? added the iec 60664-1 ratings table ......................................................................................................................... 15 copyright ? 2007 ? 2010, texas instruments incorporated submit documentation feedback 21 product folder link(s): iso7240cf iso7240c iso7240m iso7241c iso7241m iso7242c iso7242m
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) iso7240cdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cdwrg4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cfdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cfdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cfdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240cfdwrg4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240mdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240mdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240mdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7240mdwrg4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241cdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241cdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241cdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241cdwrg4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241mdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241mdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7241mdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr ISO7241MDWRG4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242cdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242cdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242cdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242cdwrg4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242mdw active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr package option addendum www.ti.com 22-mar-2010 addendum-page 1
orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) iso7242mdwg4 active soic dw 16 40 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242mdwr active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr iso7242mdwrg4 active soic dw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 22-mar-2010 addendum-page 2
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant iso7240cdwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 iso7240cfdwr soic dw 16 2000 330.0 16.4 10.9 10.78 3.0 12.0 16.0 q1 iso7240mdwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 iso7241cdwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 iso7241mdwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 iso7242cdwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 iso7242mdwr soic dw 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 q1 package materials information www.ti.com 22-mar-2010 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) iso7240cdwr soic dw 16 2000 358.0 335.0 35.0 iso7240cfdwr soic dw 16 2000 358.0 335.0 35.0 iso7240mdwr soic dw 16 2000 358.0 335.0 35.0 iso7241cdwr soic dw 16 2000 358.0 335.0 35.0 iso7241mdwr soic dw 16 2000 358.0 335.0 35.0 iso7242cdwr soic dw 16 2000 358.0 335.0 35.0 iso7242mdwr soic dw 16 2000 358.0 335.0 35.0 package materials information www.ti.com 22-mar-2010 pack materials-page 2

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